Position Encoding Module
(LPSD position decoding electronics)
Features
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- Two nuclear-type pulse shaping amplifiers with computer controlled gains.
- Computer controlled hardware LLD.
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Two 16-bit ADCs with 2.5 usec pulse processing time.
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Trimpot adjustable pole-zero input compensation.
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Four front-panel output connectors for monitoring the Amp_A, Amp_B, Sum (Amp_A+Amp_B) and LLD outputs.
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Two rear-panel amplifier input BNC connectors .
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Computer controlled software LLD for LPSD position calculations.
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LPSD data maintained in four internal 12-bit wide and 32-bit deep histograms containing the ADC_A, ADC_B, ADC_SUM and Position histograms.
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Computer controlled histogram width: 7-bits < Histogram width < 12 bits.
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Amplifier gains and LLD settings maintained by non-volatile memory
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Connection to host via USB.
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1-wide NIM module
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Description
The
Position Encoding Module (PEM) has been designed for processing the
signals from charge division LPSDs. These units are packaged in
1-wide NIM enclosures and derive their power from a NIM bin and NIM
power supply. Each module is equipped with two linear pulse-shaping
amplifiers, a summing amplifier, an integral discriminator and two
16-bit successive approximation ADCs. A block diagram of the PEM is
shown in the figure below which displays the typical arrangement of a single
charge-division LPSD, connected to two preamplifiers, one at each
end.
The
PEM amplifiers have been designed to match the pulse shaping and
output amplitude range of the hybrid circuit preamplifiers used for LPSDs, which produce a 10-30 nsec rise time pulse with a
exponential fall time (~50 micro sec). The signals from the
preamplifiers for neutron events in the detector (at ~2000 V bias)
are approximately 200 mv for neutrons near the maximum in the neutron
pulse height spectrum. The gain of the PEM amplifiers is adjustable
over a 2:1 range under the control of the host computer. The exact
range of gain settings needed for the operation of the PEM with the
detector will depend on the bias voltage used, and the
characteristics of the detectors. The range of gain settings available with the
digital controls can be altered by the selection of internal gain setting
resistors.
The
PEM is normally operated with the outputs of Amp_A and Amp_B balanced
(equal) and signals from the Sum amplifier that exceed the LLD cause
the Amp_A and Amp_B signals to be digitized by the 16-bit ADCs, ADC_A
and ADC_B. Data acquisition can be for a fixed time (with a clock
maintained internally on each PEM) or it can be under control of the
host computer. During data acquisition, the PEM maintains the
histograms for ADC_A, ADC_B, ADC_Sum and Position (ADC_B/(ADC_Sum)).
The histograms are all 4-bytes deep. In addition, during data
acquisition, the PEM maintains a 4-byte counter that records the
number of events that exceed the LLD.
The
PEM is equipped with Base Line Restoration and Pole Zero Correction.
The peaking time for the analog signal is 1.5 msec
a baseline width (at 1% of the amplitude) of 3.6 msec.
The PEM ADCs digitize the input pulse in 10 msec
with an additional 2 msec
cycle time for a total of 12 msec/pulse. Experiments with the PEM demonstrate that the system is capable of
processing signals at a synchronous rate of 66 kHz.
It
is possible to perform a first-order dead-time correction to the PEM
data to recover the pulses lost at high input count rates. The Sum
histogram records (in the top histogram channel) the number of events
where either the Sum signal or ADC_A or ADC_B has exceeded the range
of the ADC. These signals are rejected and their position is not
calculated or histogrammed.
Let f = (Sum(Position
histogram) + the number of signals rejected)/(LLD events). This
represents the fraction of the incident neutrons analyzed. The
quantity (1-f) is the fraction lost by the signal processing
electronics. The fraction of events lost has the same position
distribution as those actually recorded so a first order dead time
correction to the data is formed by multiplying the contents of each
histogram cell by 1/f.
For
high-resolution applications, the 16-bit ADC data is truncated to 12
bits when the data is histogrammed and the system maintains 4 12-bit
wide 4-byte deep histograms internally. For lower resolution
requirements, the data can be further truncated. If a different
resolution were to be desired, changes in resolution can be
accomplished with alterations of the PEM firmware.
Communication
between the PEM and the host (control) computer is by USB-bus. Up to
127 devices can communicate with the host through one USB input
connector. Each PEM has a unique serial number recorded in an
on-board Serial-EEProm that can be used by the customer's control
software to associate a particular PEM with a particular detector
element. A driver, suitable for use with Microsoft Windows XP through Windows 8 is supplied with the PEMs.
The
driver provides the functionality required to:
Add the PEM to the
list of devices on the USB bus
Load the firmware
that sets the characteristics of the PEM
Control the level
of the amplifiers, ADC offsets and LLD threshold.
Specify the time
for data acquisition
Clear the
histograms and event counter
Start and stop data
acquisition.
Set the histogram
resolution between 7-bits and 12-bits.
Return the selected
histogram to the host computer.
The
USB specification provides for a raw transmission speed of 12
Mbit/sec. In addition to the device driver, a Java test program,
suitable for exercising the PEM and providing an example use of the
driver is supplied.
